1. Field of the Invention
The present invention relates to a system and method for compiling a computer program in order to determine where to store the computer program in memory for subsequent retrieval by a data processing apparatus that is to execute the computer program.
2. Description of the Prior Art
When designing a processing unit such as a central processing unit (CPU) or a Digital Signal Processor (DSP), there are a number of factors which are important in determining the success of that processing unit. Firstly, it is desirable to minimise the cost of the processing unit, and significant factors in this are the cost of local program memory, which is primarily dictated by the size of such local program memory, as well as the energy consumption associated with access to the memory. However, when considering such cost factors, another factor that has to be borne in mind is the risk that the size and complexity of an application written to run on such a processing unit becomes strongly constrained by the selected local program memory size. Hence, whilst reducing the size of the local program memory will reduce the cost of the processing unit, this has to be weighed against the need to reduce the above risk.
Nowadays, a number of DSP designs are being targeted at high throughput computation, and for such implementations the presence of local high speed, high availability, memory is often a requirement.
There are a number of known approaches which aim to reduce the cost of the processing unit by enabling a reduction in local program memory size and a reduction in energy consumption associated with access to memory. A first approach employs linker based modular programming to enable dynamic, and either automatic or manual, management of functional objects such as the program, static (shared) data space and state data space. Another approach involves the use of automatic, instruction level, virtualisation of the memory space through the use of caches or paging mechanisms.
Both of the above approaches can provide powerful techniques for reducing the earlier-mentioned costs, but they also incur their own costs. For example, a cache is purely reactive unless some assumptions about the data being cached are made (e.g. the processing unit needs the first line of data and hence probably also requires the second). In addition, caches are costly to implement, since each cache line or block requires a tag structure to be provided to manage access to the cache. With regard to the earlier described modular programming approach, this requires the partitioning of code into modules, with the modules then being fetched from memory as needed. Such partitioning of the code is performed based on the organisation of the code in the source language, and on tool behaviour in the example of a linkage based model, but not on the actual code's behaviour, and accordingly it should be noted that the partitioning is performed based on incomplete information. Given this incomplete information, it is typically the case that such modular programming will not minimise the cost figures discussed earlier, namely minimal local memory requirement and minimal power consumption. Furthermore, it should be noted that the partitioning required will be implementation specific.
It should be noted that although the modular programming approach or the cache/paging mechanism approach discussed earlier are effective at reducing the risk of “insufficient memory”, they do so with an additional cost. In a modular system, the module sizes and their required swapping result in memory fragmentation. In a cached system, since all access is performed through the cache, the cache is in fact the earlier mentioned high-speed and high availability memory in question but due to its complexity and tight coupling with the CPU, the attainable CPU speed depends on the cache size, effectively limiting this size.
Accordingly, it would be desirable to provide an improved technique for reducing the earlier-mentioned cost issues associated with the processing unit, whilst also reducing the risk that the total size and complexity of an application written to run on that processing unit is unduly constrained by the local program memory size associated with the processing unit, without having to resort to traditional caching and/or modularization techniques.